Semiconductor memory device and memory system
US9704570B2 · kind B2 · utility
14Cited by
4References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 8, 2016 |
| Grant date | Jul 11, 2017 |
| Priority date | — |
| Expiry date | Mar 8, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/71
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, a semiconductor memory device includes first and second memory cells, a word line, and first and second bit lines. The first and second bit lines are electrically connected to one ends of the first and second memory cells, respectively. In retry reading, a voltage applied to the first bit line is different from a voltage applied to the second bit line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.