Semiconductor device and method for fabricating the same
US9704751B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 26, 2016 |
| Grant date | Jul 11, 2017 |
| Priority date | — |
| Expiry date | Feb 26, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A substrate having a first area and a second area is provided. The substrate is patterned to form trenches in the substrate and semiconductor fins between the trenches, wherein the semiconductor fins comprises first semiconductor fins distributed in the first area and second semiconductor fins distributed in the second area. A first fin cut process is performed in the first area to remove portions of the first semiconductor fins. Insulators are formed in the trenches after the first fin cut process is performed. A second fin cut process is performed in the second area to remove portions of the second semiconductor fins until concaves are formed between the insulators in the second area. A gate stack is formed to partially cover the first semiconductor fins, the second semiconductor fins and the insulators.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.