Semiconductor device having a memory cell and method of forming the same
US9704871B2 · kind B2 · utility
6Cited by
0References
12Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 31, 2015 |
| Grant date | Jul 11, 2017 |
| Priority date | — |
| Expiry date | Feb 4, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/10
Abstract
There is provided an apparatus includes a substrate having a main surface, a wordline buried in the substrate and a bitline buried in a shallower area than the wordline in the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.