Patent · US Active

Execution of instruction loops using an instruction buffer

US9710276B2 · kind B2 · utility

3Cited by
9References
22Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 9, 2012
Grant dateJul 18, 2017
Priority date
Expiry dateAug 13, 2034

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F9/3867
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

In a normal, non-loop mode a uOp buffer receives and stores for dispatch the uOps generated by a decode stage based on a received instruction sequence. In response to detecting a loop in the instruction sequence, the uOp buffer is placed into a loop mode whereby, after the uOps associated with the loop have been stored at the uOp buffer, storage of further uOps at the buffer is suspended. To execute the loop, the uOp buffer repeatedly dispatches the uOps associated with the loop's instructions until the end condition of the loop is met and the uOp buffer exits the loop mode.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.