Circuits for and methods of controlling the operation of a hybrid memory system
US9711194B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 28, 2015 |
| Grant date | Jul 18, 2017 |
| Priority date | — |
| Expiry date | Apr 4, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7203
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit for controlling the operation of a memory system having different types of memory is described. The circuit comprises a first memory having a first type of memory element and having a first access time; a second memory having a second type of memory element and having a second access time, wherein the second type of memory element is different than the first type of memory element; a memory control circuit enabling access to the first memory and the second memory; a delay buffer coupled to the second memory to compensate for a difference in the first access time and the second access time; and a circuit for merging outputs of the first memory and delayed outputs of the second memory to generate ordered output data. A method of controlling the operation of a memory system is also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.