Methods of forming hetero-layers with reduced surface roughness and bulk defect density of non-native surfaces and the structures formed thereby

US9711591B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Niloy Mukherjee · Beaverton, US
• Matthew V. Metz · Portland, US
• James M. Powers · Paradise Valley, US
• Van H. Le · Portland, US
• Benjamin Chu-Kung · Portland, US
• Mark R. Lemay · Vernonia, US
• Marko Radosavljevic · Portland, US
• Niti Goel · Portland, US
• Loren A. Chow · Santa Clara, US
• Peter G. Tolchinsky · Beaverton, US
• Jack T. Kavalieros · Portland, US
• Robert S. Chau · Beaverton, US

Key dates

• Filing date: Dec 28, 2011
• Grant date: Jul 18, 2017
• Expiry date: Dec 28, 2031

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/02664
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Methods of forming hetero-layers with reduced surface roughness and bulk defect density on non-native surfaces and the devices formed thereby are described. In one embodiment, the method includes providing a substrate having a top surface with a lattice constant and depositing a first layer on the top surface of the substrate. The first layer has a top surface with a lattice constant that is different from the first lattice constant of the top surface of the substrate. The first layer is annealed and polished to form a polished surface. A second layer is then deposited above the polished surface.