Seed layer deposition in microscale features
US9714474B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 6, 2010 |
| Grant date | Jul 25, 2017 |
| Priority date | — |
| Expiry date | Oct 19, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2221/1089
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method and system for coating the interior surfaces of microscale hole features fabricated into the substantially planar surface of a work piece. The method comprises providing a work piece with a barrier metal coating that is substantially continuous and uniform both along the planar surface of the work piece and the inner surfaces of the microscale hole features wherein said barrier metal coating is applied by a substantially surface reaction limited process. The workpiece is provided with a coating, on the planar surface of the work piece, of a thick metal layer anchored to the barrier metal coat and disposed to provide substantially uniform electrical conduction capability to the microscale features located throughout and across the workpiece. An electrical contact path is provided to the electrically conductive coating at the perimeter of the work piece. The workpiece is immersed in a chemical bath, causing said chemical bath to fully contact the interior surfaces of the microscale hole features, said chemical bath containing metal ions suitable for electrodeposition. An electric potential is applied at the perimeter of the work piece to cause electrodeposition of metal ions…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.