Multiprocessor computer system

US9715458B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Thomas Koehler · Holzgerlingen, DE
• Frank Lehnert · Weil im Schönbuch, DE

Key dates

• Filing date: Jul 30, 2015
• Grant date: Jul 25, 2017
• Expiry date: Aug 11, 2035

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F2212/681
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A computer system has physical processors supporting virtual addressing. Virtual processors represent multiple execution threads, and logical state of all threads of a virtual processor is stored in a state descriptor field in main memory when the virtual processor is removed from one of the physical processors. Each thread has assigned a thread identifier, which is unique in the respective virtual processor only, and each virtual processor has assigned a unique state descriptor identifier. Address translations for the threads of the multiple virtual processors under their respective thread identifier and state descriptor identifier are stored, and a sequence number is generated when an entry in the translation lookaside buffer is created. The sequence number is stored together with a respective thread identifier, state descriptor identifier, and a valid bit in a respective translation lookaside buffer entry. A determination is made as to whether an address translation is stored in the translation lookaside buffer for a current thread identifier and a current state descriptor identifier by comparing the translation lookaside buffer entries with the entries in the state descriptor/t…