Non-volatile memory with supplemental select gates
US9715938B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 21, 2015 |
| Grant date | Jul 25, 2017 |
| Priority date | — |
| Expiry date | Oct 23, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/024
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile memory system includes a plurality of groups of connected non-volatile memory cells (e.g., charge trapping memory cells), a select line, and a plurality of select gates connected to the select line. Each select gate is connected at an end (e.g. source end or drain side) of one of the groups of memory cells. The system includes one or more control circuits that are configured to determine whether the select gates are abnormal. If a select gate is determined to be abnormal, then one of the memory cells connected to the select gate is converted to operate as a select gate. The system will then perform memory operations by operating the converted memory cell as a select gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.