Patent · US Active

Write driver and level shifter having shared transistors

US9721651B2 · kind B2 · utility

2Cited by
11References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 30, 2016
Grant dateAug 1, 2017
Priority date
Expiry dateSep 30, 2036

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10B10/18
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A circuit includes: a first data line; a second data line; a write driver including first and second transistors; a first switch connected in series with the first transistor to form a first series-connected pair; a second switch in series with the second transistor to form a second series-connected pair; and a level shifter which includes the first and second transistors. The first series-connected pair is coupled between a first voltage node and the first data line. The second series-connected pair is coupled between the first voltage node and the second data line. Gate terminals of the first and second transistors are correspondingly cross-coupled with the second and first data lines.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.