Land side and die side cavities to reduce package z-height
US9721882B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 30, 2017 |
| Grant date | Aug 1, 2017 |
| Priority date | — |
| Expiry date | Jan 30, 2037 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A package structure including a capacitor mounted within a cavity in the package substrate is disclosed. The package structure may additionally include a die mounted to a die side surface of the package substrate, and the opposing land side surface of the package substrate may be mounted to a printed circuit board (PCB). The capacitor may be mounted within a cavity formed in the die side surface of the package substrate or the land side surface of the package substrate. Mounting a capacitor within a cavity may reduce the form factor of the package. The die may be mounted within a cavity formed in the die side surface of the package substrate. Solder balls connecting the package to the PCB may be mounted within one or more cavities formed in one or both of the package substrate and the PCB.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.