Field-effect transistor stack voltage compensation
US9721936B2 · kind B2 · utility
16Cited by
4References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 4, 2014 |
| Grant date | Aug 1, 2017 |
| Priority date | — |
| Expiry date | Aug 4, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
Abstract
Field-effect transistor (FET) stack voltage compensation. In some embodiments, a switching device can include a first terminal and a second terminal, and a plurality of switching elements connected in series between the first and terminal and the second terminal. Each switching element has a parameter that is configured to yield a desired voltage drop profile among the connected switching elements. Such a desired voltage drop profile can be achieved by some or all FETs in a stack having variable dimensions such as variable gate width or variable numbers of fingers associated with the gates.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.