CMOS integrated moving-gate transducer with silicon as a functional layer
US9725298B2 · kind B2 · utility
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4References
19Claims
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Key dates
| Filing date | Jan 6, 2016 |
| Grant date | Aug 8, 2017 |
| Priority date | — |
| Expiry date | Jan 6, 2036 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB81C2203/0771
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A method of fabricating a semiconductor device comprises forming a dielectric layer above a substrate, the dielectric layer including a fixed dielectric portion and a proof mass portion, forming a source region and a drain region in the substrate, forming a gate electrode in the proof mass portion, and releasing the proof mass portion, such that the proof mass portion is movable with respect to the fixed dielectric portion and the gate electrode is movable with the proof mass portion relative to the source region and the drain region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.