System and method for implementing reader-writer locks using hardware transactional memory
US9727369B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 16, 2016 |
| Grant date | Aug 8, 2017 |
| Priority date | — |
| Expiry date | May 16, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2209/523
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Transactional reader-writer locks may leverage available hardware transactional memory (HTM) to simplify the procedures of the reader-writer lock algorithm and to eliminate a requirement for type stable memory An HTM-based reader-writer lock may include an ordered list of client-provided nodes, each of which represents a thread that holds (or desires to acquire) the lock, and a tail pointer. The locking and unlocking procedures invoked by readers and writers may access the tail pointer or particular ones of the nodes in the list using various combinations of transactions and non-transactional accesses to insert nodes into the list or to remove nodes from the list. A reader or writer that owns a node at the head of the list (or a reader whose node is preceded in the list only by other readers' nodes) may access a critical section of code or shared resource.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.