Patent · US Active

Texture cache memory system of non-blocking for texture mapping pipeline and operation method of texture cache memory

US9727474B2 · kind B2 · utility

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9References
19Claims
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Key dates

Filing dateAug 14, 2013
Grant dateAug 8, 2017
Priority date
Expiry dateSep 2, 2033

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F12/0855
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A non-blocking texture cache memory for a texture mapping pipeline and an operation method of the non-blocking texture cache memory may include: a retry buffer configured to temporarily store result data according to a hit pipeline or a miss pipeline; a retry buffer lookup unit configured to look up the retry buffer in response to a texture request transferred from a processor; a verification unit configured to verify whether result data corresponding to the texture request is stored in the retry buffer as the lookup result; and an output control unit configured to output the stored result data to the processor when the result data corresponding to the texture request is stored as the verification result.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.