Chip card reading arrangement
US9727766B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 12, 2016 |
| Grant date | Aug 8, 2017 |
| Priority date | — |
| Expiry date | Feb 12, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B5/26
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A chip card reading arrangement is provided including a chip card reading device including a data processing circuit and a reader antenna coupled to the data processing circuit arranged at a surface of the chip card reading device for placing a chip card to communicate with the chip card reading device via the reader antenna. The data processing circuit is configured to process at least one of signals received via the reader antenna and signals to be transmitted via the reader antenna. The chip card reading arrangement further includes an antenna structure including an antenna body, a first antenna and a second antenna coupled to the first antenna and surrounded by the first antenna. The antenna structure is arranged on and fixed to the surface of the chip card reading device such that the reader antenna surrounds the second antenna.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.