Non-volatile flip-flop with enhanced-scan capability to sustain sudden power failure
US9728241B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 2, 2016 |
| Grant date | Aug 8, 2017 |
| Priority date | — |
| Expiry date | May 2, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C14/0081
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Non-volatile flip-flops (NVFFs) based circuitries and schemes that incorporate magnetic tunnel junctions (MTJs) are provided to ensure fast data storage and restoration from an intentional or unintentional power outage. The NVFFs based circuitries and schemes also include enhanced scan mode testing capability by exploiting the nonvolatile latch to function as hold latch for delay testing. The NVFFs based circuitries and schemes eliminate additional write drivers, and may operate at an operation frequency of, for example, up to 2 GHz at a supply voltage of 1.1 V and with 0.55 pJ of energy consumption. A near uniform write latency can be achieved through transistor sizing, given write asymmetry of MTJs. NVFFs based circuitries and schemes incorporating data-dependent power gating circuitries can be used to mitigate high static currents generated during retention and back-to-back writing of identical input data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.