Semiconductor structure and manufacturing method thereof
US9728454B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 22, 2016 |
| Grant date | Aug 8, 2017 |
| Priority date | — |
| Expiry date | Aug 22, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/62
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides a semiconductor structure, includes a substrate, a dielectric layer disposed on the substrate, a first gate structure and a second gate structure disposed in the dielectric layer, a hard mask disposed in the dielectric layer, where the hard mask covers a sidewall of the first gate structure, and covers the second gate structure, and a contact structure disposed in the dielectric layer. The contact structure at least crosses over the hard mask. The contact structure includes a first contact portion and a second contact portion. The first contact portion contacts the first gate structure directly, the second contact portion contacts the substrate directly, and the hard mask is disposed between the first contact portion and the second contact portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.