Method for singulating an assemblage into semiconductor chips, and semiconductor chip
US9728459B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 8, 2013 |
| Grant date | Aug 8, 2017 |
| Priority date | — |
| Expiry date | Nov 8, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/0363
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for singulating an assemblage (1) into a plurality of semiconductor chips (10) is specified, wherein an assemblage comprising a carrier (4), a semiconductor layer sequence (2) and a metallic layer (3) is provided. Separating trenches (45) are formed in the carrier. The assemblage is subjected to mechanical loading, with the result that the metallic layer breaks along the separating trenches and the assemblage is singulated into semiconductor chips, wherein the singulated semiconductor chips each have part of the semiconductor layer sequence, of the carrier and of the metallic layer. A semiconductor chip (10) is furthermore specified.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.