Magnetic tunnel junction patterning using low atomic weight ion sputtering
US9728717B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 17, 2015 |
| Grant date | Aug 8, 2017 |
| Priority date | — |
| Expiry date | Jun 17, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/01
Abstract
A method of magnetic tunnel junction patterning for magnetoresistive random access memory devices using low atomic weight ion sputtering. The method includes: providing a magnetoresistive random access memory device including a hard mask metal, a MTJ element, and a semiconductor substrate, wherein the hard mask metal is disposed on the MTJ element and, wherein the MTJ element is disposed on the semiconductor substrate; and etching back the MTJ element into a plurality of MTJ element pillars using a low atomic weight ion sputtering. A magnetoresistive random access memory device using low atomic weight ion sputtering. The device includes: a semiconductor substrate; a plurality of MTJ element pillars disposed on the semiconductor substrate, wherein the plurality of MTJ element pillars is etched from a MTJ element using a low atomic weight ion sputtering; and a hard mask metal disposed on the MTJ element pillars.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.