Digital low drop-out regulator and resistive memory device using the same
US9734904B1 · kind B1 · utility
Assignees
Inventors
Key dates
| Filing date | Feb 2, 2017 |
| Grant date | Aug 15, 2017 |
| Priority date | — |
| Expiry date | Feb 2, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C13/0021
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A digital LDO regulator includes a first comparison circuit to compare an output voltage with a reference voltage and to output a reference load switching signal when the output voltage rises above the reference voltage, a logic circuit to output a control current in response to the reference load switching signal, a second comparison circuit to compare the output voltage with a transient reference voltage and to output a transient load switching signal when the output voltage rises above the transient reference voltage, a switching circuit to control the logic circuit to pass a transient current in response to the transient load switching signal, a circuit to provide a mirroring current to the logic circuit after a transient state, a load current supply circuit to switch in response to the control current and to supply a load current, and a capacitor coupled to the load current supply circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.