Reprogramming single bit memory cells without intervening erasure
US9734912B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 12, 2016 |
| Grant date | Aug 15, 2017 |
| Priority date | — |
| Expiry date | Jul 12, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5641
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method to operate a single bit per cell memory comprises erasing a group of memory cells establishing a first logical value by setting threshold voltages in a first range of threshold voltages. First writing, after said erasing, includes programming first selected memory cells to establish a second logical value by setting threshold voltages in a second range of threshold voltages, and saving a sensing state parameter to indicate a first read voltage. Second writing, after said first writing, includes programming second selected memory cells to establish the second logical value by setting threshold voltages in a third range of threshold voltages, and saving the sensing state parameter to indicate a second read voltage. After a number of writings including said first writing and said second writing reaches a threshold number for writing the group of memory cells, the group of memory cells can be erased.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.