Structures and methods for reliable packages
US9741620B2 · kind B2 · utility
165Cited by
12References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 24, 2015 |
| Grant date | Aug 22, 2017 |
| Priority date | — |
| Expiry date | Jun 27, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3512
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A device and method of forming the device that includes cavities formed in a substrate of a substrate device, the substrate device also including conductive vias formed in the substrate. Chip devices, wafers, and other substrate devices can be mounted to the substrate device. Encapsulation layers and materials may be formed over the substrate device in order to fill the cavities.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.