Integrated circuit with die edge assurance structure
US9741667B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 10, 2015 |
| Grant date | Aug 22, 2017 |
| Priority date | — |
| Expiry date | Apr 10, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/585
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Integrated circuits with edge assurance structures are provided for more reliable and efficient monitoring of the die edge integrity using, for example, Automatic (or Automated) Test Equipment (ATE). The edge assurance structures can be used to test, for example, all (100%) of the production materials with virtually no extra cycle time and cost. The edge assurance structure can be located around an edge of the integrated circuit. The edge assurance structure can include a plurality of v-shaped structures that are connected to each other using a plurality of ultra-thick vias. The integrated circuit can include a pad that is coupled to the edge assurance structure. The pad can be used to measure a resistance of the edge assurance structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.