Patent · US Active

Transient voltage suppressor and ESD protection device and array thereof

US9741708B2 · kind B2 · utility

1Cited by
6References
16Claims
0Family size

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Inventors

Key dates

Filing dateJun 25, 2015
Grant dateAug 22, 2017
Priority date
Expiry dateJun 25, 2035

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D62/85

Abstract

Provided is a transient voltage suppressor including a substrate, a well region of a first conductivity type, a first doped region of a second conductivity type, and a second doped region of the second conductivity type. The substrate is electrically floating. The well region is located in the substrate. The first doped region is located in the well region to form a diode, and the first doped region is electrically connected to a first voltage. The second doped region is located in the well region, and the second doped region is electrically connected to a second voltage.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.