System and method for a low noise amplifier module
US9742364B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 3, 2016 |
| Grant date | Aug 22, 2017 |
| Priority date | — |
| Expiry date | May 3, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/10
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In accordance with an embodiment, a circuit includes a low noise amplifier transistor disposed on a first integrated circuit, a single pole multi throw (SPMT) switch disposed on a second integrated circuit, and a bypass switch coupled between a control node of the low noise amplifier transistor and an output node of the low noise amplifier transistor. The SPMT switch couples a plurality of module input terminals to a control node of the low noise amplifier transistor, and the bypass switch including a first switch coupled between the control node of the low noise amplifier transistor and an intermediate node, a second switch coupled between the intermediate node and the output node of the low noise amplifier transistor, and a third switch coupled between the intermediate node and a first reference node. The first integrated circuit and the second integrated circuit are disposed on a substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.