Patent · US Active

System and method for time-to-digital converter fine-conversion using analog-to-digital converter (ADC)

US9746832B1 · kind B1 · utility

7Cited by
7References
20Claims
0Family size

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Inventor

Key dates

Filing dateFeb 14, 2017
Grant dateAug 29, 2017
Priority date
Expiry dateFeb 14, 2037

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03M1/145
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

An apparatus and a method. The apparatus includes a delay processor, a coarse converter and node selector connected to the delay processor and configured to select a first voltage V1 and a second voltage V2 of opposite polarities of adjacent stages of the delay processor, a fine converter connected to the coarse converter and node selector and configured to determine a zero-crossing time associated with the first voltage V1 and the second voltage V2; and an encoder connected to the coarse converter and the fine converter and configured to receive and encode the first voltage V1, the second voltage V2 and the zero-crossing time, wherein V1 is a first negative voltage before the zero-crossing time, and V2 is a first positive voltage after the zero-crossing time.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.