Method and system for improving error correction in data storage
US9747157B2 · kind B2 · utility
2Cited by
29References
16Claims
0Family size
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Key dates
| Filing date | Nov 8, 2013 |
| Grant date | Aug 29, 2017 |
| Priority date | — |
| Expiry date | Feb 11, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of operation of a data storage system includes: monitoring a data interface bus, the monitoring by a non-volatile memory controller; activating a zero bit counter for detecting a ratio of 1's to 0's on the data interface bus; and adjusting a threshold voltage (Vth), based on the ratio of the 1's to the 0's from the zero bit counter, by the non-volatile memory controller.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.