Graphene field effect transistor
US9748340B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 22, 2012 |
| Grant date | Aug 29, 2017 |
| Priority date | — |
| Expiry date | Sep 16, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/691
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
Graphene FETs exhibit low power consumption and high switching rates taking advantage of the excellent mobility in graphene deposited on a rocksalt oxide (111) by chemical vapor deposition, plasma vapor deposition or molecular beam epitaxy. A source, drain and electrical contacts are formed on the graphene layer. These devices exhibit band gap phenomena on the order of greater than about 0.5 eV, easily high enough to serve as high speed low power logic devices. Integration of this construction technology, based on the successful deposition of few layer graphene on the rocksalt oxide (111) with SI CMOS is straightforward.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.