Integrated circuits using guard rings for ESD systems, and methods for forming the integrated circuits

US9748361B2 · kind B2 · utility

Assignee

• TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

• Ming-Song Sheu · Hsinchu, TW
• Jian-Hsing Lee · Xinwen, TW
• Yu-Chang Jong · Baoshan, TW
• Chun-Chien Tsai · Yongkang, TW

Key dates

• Filing date: Jun 24, 2014
• Grant date: Aug 29, 2017
• Expiry date: Apr 27, 2035

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/307

Abstract

An integrated circuit includes at least one transistor over a substrate, and a first guard ring disposed around the at least one transistor. The integrated circuit further includes a second guard ring disposed around the first guard ring. The integrated circuit further includes a first doped region disposed adjacent to the first guard ring, the first doped region having a first dopant type. The integrated circuit further includes a second doped region disposed adjacent to the second guard ring, the second doped region having a second dopant type.