Radiation-hardened CMOS logic device
US9748955B1 · kind B1 · utility
2Cited by
2References
16Claims
0Family size
Assignee
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Key dates
| Filing date | Nov 29, 2016 |
| Grant date | Aug 29, 2017 |
| Priority date | — |
| Expiry date | Nov 29, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/811
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A radiation-hardened logic device includes a first n-channel transistor coupled by its main conducting nodes between an output node of a logic device and a supply voltage rail and a first p-channel transistor coupled by its main conducting nodes between the output node of the logic device and a ground voltage rail. The gates of the first n-channel and p-channel transistors are coupled to the output node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.