Histogram based error estimation and correction
US9748966B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 8, 2016 |
| Grant date | Aug 29, 2017 |
| Priority date | — |
| Expiry date | Aug 8, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/168
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A system includes an analog-to-digital converter (ADC) including an ADC input terminal; an ADC output terminal; and analog components configured to convert an analog signal received at the ADC input terminal to a digital signal. The system also includes a histogram estimation circuit coupled to the ADC output terminal and configured to generate information on a plurality of codes generated by the ADC and determine a region defining a range of codes corresponding to an occurrence of an error caused by the analog components of the ADC. The system also includes a dither circuit coupled to the ADC input terminal and configured to introduce a dither in the analog signal to generate a modified analog signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.