Method of operation for an oversampled data converter
US9748969B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 14, 2016 |
| Grant date | Aug 29, 2017 |
| Priority date | — |
| Expiry date | Apr 14, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/452
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In accordance with an embodiment, a method of operating an oversampled data converter having a switched-capacitor (SC) integrator includes operating the oversampled data converter in a gain calibration mode; applying a first voltage to a feedback port of the SC integrator to form a feedback voltage, and during a first clock phase the method further includes applying the first voltage to a first series capacitor via the input port when an output of the oversampled data converter is in a first state; applying a bypass voltage to the first series capacitor when the output of the oversampled data converter is an a second state and applying the first voltage to a second series capacitor via the feedback port with a polarity based on the output of the oversampled data converter, and during a second clock phase the method includes integrating charges of the first series capacitor and the second series capacitor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.