Dynamic reconditioning of charge trapped based memory
US9753657B2 · kind B2 · utility
5Cited by
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18Claims
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Key dates
| Filing date | Sep 18, 2015 |
| Grant date | Sep 5, 2017 |
| Priority date | — |
| Expiry date | Oct 22, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/349
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A storage device with a charge trapping (CT) based memory may include improved data retention (DR) performance. The CT memory may be 3D memory that uses a charge storage layer for storing charge may have unique data retention behavior. Memory blocks using a charge storage layer may be dynamically detected and reconditioned and re-programmed to improve memory characteristics, such as data retention. The reconditioning may include a dedicated erase cycle for a block that improves the data retention.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.