Method of forming semiconductor device
US9755046B2 · kind B2 · utility
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6References
10Claims
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Assignee
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Key dates
| Filing date | Jan 13, 2017 |
| Grant date | Sep 5, 2017 |
| Priority date | — |
| Expiry date | Jan 13, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/021
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a semiconductor device is provided. At least two shallow trenches are formed in a substrate. An insulating layer is formed on surfaces of the substrate and the shallow trenches. A conductive layer is formed on the substrate between the shallow trenches. At least one spacer is formed on a sidewall of the conductive layer, wherein the spacer fills up each shallow trench.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.