Reduction of graphical processing through coverage testing
US9760968B2 · kind B2 · utility
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21References
26Claims
0Family size
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Key dates
| Filing date | Oct 31, 2014 |
| Grant date | Sep 12, 2017 |
| Priority date | — |
| Expiry date | Jun 19, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T15/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for using a graphics processor by an electronic device for subdividing an input image into multiple sub-regions. For each particular sub-region, a data structure is created that identifies one or more primitives that are visible in each quad of the particular sub-region. Existing coverage of one or more quads is erased based on graphics state (GState) information resulting in surviving coverage for one or more quads.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.