MTP-thyristor memory cell circuits and methods of operation
US9761295B2 · kind B2 · utility
4Cited by
8References
45Claims
0Family size
Assignee
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Key dates
| Filing date | Sep 30, 2016 |
| Grant date | Sep 12, 2017 |
| Priority date | — |
| Expiry date | Sep 30, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/131
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An MTP (Many Times Programmable) memory cell for integrated circuit memory arrays is described. The cell includes an MTP device and a thyristor interconnected so that the MTP device triggers the thyristor to turn on during a Read or Verify operation. The difference in threshold voltages between a data memory cell and a reference memory cell is used to determine the information in the data memory cell. Different memory cell structures may be constructed for different memory array requirements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.