Inventor · Saratoga, CA, US

Harry Luan

64Patents
10h-index
29Co-inventors
74Inventor score

Filing activity: Apr 2, 2003 → Apr 13, 2021

Most-cited inventions

PatentTitleAreaCited byStatus
US7408212B1 Stackable resistive cross-point memory with schottky diode isolation Electricity 68 Expired
US7269047B1 Memory transistor gate oxide stress release and improved reliability Physics 60 Expired
US7173851B1 3.5 transistor non-volatile memory cell using gate breakdown phenomena Physics 43 Expired
US6791891B1 Method of testing the thin oxide of a semiconductor memory cell that uses breakdown voltage Physics 33 Expired
US7471541B2 Memory transistor gate oxide stress release and improved reliability Physics 26 Active
US9449669B2 Cross-coupled thyristor SRAM circuits and methods of operation Electricity 13 Active
US7586787B2 Reducing bit line leakage current in non-volatile memories Physics 12 Active
US8330189B2 One-time programmable memory and method for making the same Electricity 11 Active
US7623368B2 Non-volatile semiconductor memory based on enhanced gate oxide breakdown Physics 11 Active
US9496020B2 Six-transistor thyristor SRAM circuits and methods of operation Electricity 10 Active
US7471540B2 Non-volatile semiconductor memory based on enhanced gate oxide breakdown Physics 9 Active
US9564441B2 Two-transistor SRAM semiconductor structure and methods of fabrication Electricity 9 Active
US9564198B2 Six-transistor SRAM semiconductor structures and methods of fabrication Electricity 9 Active
US7277348B2 Memory cell comprising an OTP nonvolatile memory unit and a SRAM unit Physics 8 Expired
US9460771B2 Two-transistor thyristor SRAM circuit and methods of operation Electricity 8 Active
US9564199B2 Methods of reading and writing data in a thyristor random access memory Electricity 7 Active
US7186658B2 Method and resulting structure for PCMO film to obtain etching rate and mask to selectively by inductively coupled plasma Electricity 7 Expired
US9852805B2 Write enhancement for one time programmable (OTP) semiconductors Physics 5 Active
US9812454B2 Methods and systems for reducing electrical disturb effects between thyristor memory cells using buried metal cathode lines Electricity 5 Active
US10978297B1 Formation of stacked lateral semiconductor devices and the resulting structures Physics 4 Active
US9761295B2 MTP-thyristor memory cell circuits and methods of operation Electricity 4 Active
US9496021B2 Power reduction in thyristor random access memory Physics 4 Active
US9837418B2 Thyristor volatile random access memory and methods of manufacture Electricity 4 Active
US8283731B2 One-time programmable memory Electricity 3 Active
US10020043B2 Methods of reading and writing data in a thyristor random access memory Electricity 2 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.