Manufacturing method for semiconductor substrate
US9761479B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jul 3, 2014 |
| Grant date | Sep 12, 2017 |
| Priority date | — |
| Expiry date | Jul 3, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8325
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A technique disclosed herein relates to a manufacturing method for a semiconductor substrate having the bonded interface with high bonding strength without forming an oxide layer at the bonded interface also for the substrate having surface that is hardly planarized. The manufacturing method for the semiconductor substrate may include an amorphous layer formation process in which a first amorphous layer is formed by modifying a surface of a support substrate and a second amorphous layer is formed by modifying a surface of a single-crystalline layer of a semiconductor. The manufacturing method may include a contact process in which the first amorphous layer and the second amorphous layer are contacted with each other. The manufacturing method may include a heat treatment process in which the support substrate and single-crystalline layer are heat-treated with the first amorphous layer and the second amorphous layer being in contact with each other.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.