Write-only dataless state for maintaining cache coherency
US9767025B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 18, 2012 |
| Grant date | Sep 19, 2017 |
| Priority date | — |
| Expiry date | Oct 25, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods for maintaining cache coherency in a multiprocessor system with shared memory, including a write-data-invalid (WDI) state configured to reduce stalls during write operations. The WDI state is a dataless state with guaranteed write permissions. When a first processor of the multiprocessor system makes a write request for a first cache entry of a first cache, the WDI state associated with the first cache entry includes write permissions for the write to directly proceed to one or more higher levels of memory in the shared memory, such that delays associated with obtaining write permissions is reduced at the first cache. The WDI state is treated as an invalid state for a read request to the first cache entry by the first processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.