Patent · US Active

Systems and methods for cache endurance

US9767032B2 · kind B2 · utility

8Cited by
254References
22Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 5, 2013
Grant dateSep 19, 2017
Priority date
Expiry dateDec 5, 2033

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/7205
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A cache and/or storage module may be configured to reduce write amplification in a cache storage. Cache layer write amplification (CLWA) may occur due to an over-permissive admission policy. The cache module may be configured to reduce CLWA by configuring admission policies to avoid unnecessary writes. Admission policies may be predicated on access and/or sequentiality metrics. Flash layer write amplification (FLWA) may arise due to the write-once properties of the storage medium. FLWA may be reduced by delegating cache eviction functionality to the underlying storage layer. The cache and storage layers may be configured to communicate coordination information, which may be leveraged to improve the performance of cache and/or storage operations.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.