Memory system performing read of nonvolatile semiconductor memory device
US9767913B2 · kind B2 · utility
28Cited by
6References
21Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 4, 2016 |
| Grant date | Sep 19, 2017 |
| Priority date | — |
| Expiry date | Nov 4, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, a memory system includes a nonvolatile semiconductor memory device, a voltage generation unit and a control unit. The nonvolatile semiconductor memory device includes a memory cell array having a plurality of blocks each including a plurality of memory cells, and a voltage generation unit configured to change a read level of the memory cell. The control unit controls write, read, and erase of the nonvolatile semiconductor memory device. The control unit changes the read level between a start of use of the nonvolatile semiconductor memory device and a timing after an elapse of a time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.