Patent · US Active

Power semiconductor substrates with metal contact layer and method of manufacture thereof

US9768036B2 · kind B2 · utility

0Cited by

6References

10Claims

0Family size

Assignee

SEMIKRON ELEKTRONIK GMBH & CO. KG · DE

Inventors

Christian Göbl · Koblenzer Straße, DE
Heiko Braml · Ebermannstadt, DE

Key dates

Filing date	May 12, 2008
Grant date	Sep 19, 2017
Priority date	—
Expiry date	Oct 21, 2028

Classification

Technology area (CPC H)Electricity
CPC primaryH05K2203/1131
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A power semiconductor substrate comprising an insulating planar base, at least one conductor track and at least one contact area as part of the conductor track, wherein a layer of a metallic material is disposed on the contact area by means of pressure sintering. The associated method comprises the steps of: producing a power semiconductor substrate that includes a planar insulating base, conductor tracks and contact areas; arranging a pasty layer, composed of a metallic material and a solvent, on at least one contact area of the power semiconductor substrate; and applying pressure to the pasty layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.