Patent · US Active

Semiconductor device assembly including a chip carrier, semiconductor wafer and method of manufacturing a semiconductor device

US9768120B2 · kind B2 · utility

0Cited by
5References
8Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 21, 2012
Grant dateSep 19, 2017
Priority date
Expiry dateOct 29, 2033

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/15747
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A semiconductor device includes a chip carrier and a semiconductor die with a semiconductor portion and a conductive structure. A soldered layer mechanically and electrically connects the chip carrier and the conductive structure at a soldering side of the semiconductor die. At the soldering side an outermost surface portion along an edge of the semiconductor die has a greater distance to the chip carrier than a central surface portion. The conductive structure covers the central surface portion and at least a section of an intermediate surface portion tilted to the central surface portion. Solder material is effectively prevented from coating such semiconductor surfaces that are prone to damages and solder-induced contamination is significantly reduced.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.