Semiconductor memory device
US9768189B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 7, 2016 |
| Grant date | Sep 19, 2017 |
| Priority date | — |
| Expiry date | Apr 7, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, a semiconductor memory device includes: a semiconductor substrate; a first semiconductor pillar above the semiconductor substrate; a first insulating layer comprising a first section and a second section, the first section being in contact with the semiconductor substrate and a bottom of the first semiconductor pillar, and the second section covering a side of the first semiconductor pillar; conductive layers and second insulating layers stacked one by one above the semiconductor substrate and covering the second section of the first insulating layer; a first plug on the first semiconductor pillar; and an interconnect on the first plug.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.