TFT backplate structure comprising transistors having gate isolation layers of different thicknesses and manufacture method thereof
US9768202B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 19, 2014 |
| Grant date | Sep 19, 2017 |
| Priority date | — |
| Expiry date | Oct 23, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/77
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides a TFT backplate structure and a manufacture method thereof. The TFT backplate structure comprises a switch TFT (T1) and a drive TFT (T2). The switch TFT (T1) is constructed by a first source/a first drain (61), a first gate (21), and a first etching stopper layer (51), a first oxide semiconductor layer (41), a first gate isolation layer (31) sandwiched in between. The drive TFT (T2) is constructed by a second source/a second drain (62), a second gate (22), and a second oxide semiconductor layer (42), a first etching stopper layer (51), a second gate isolation layer (32) sandwiched in between. The electrical properties of the switch TFT (T1) and the drive TFT (T2) are different. The switch TFT has smaller subthreshold swing to achieve fast charge and discharge, and the drive TFT has relatively larger subthreshold swing for controlling the current and the grey scale more precisely.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.