Formation of dislocations in source and drain regions of FinFET devices
US9768256B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 21, 2016 |
| Grant date | Sep 19, 2017 |
| Priority date | — |
| Expiry date | Mar 21, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/0262
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of mechanisms for forming dislocations in source and drain regions of finFET devices are provided. The mechanisms involve recessing fins and removing the dielectric material in the isolation structures neighboring fins to increase epitaxial regions for dislocation formation. The mechanisms also involve performing a pre-amorphous implantation (PAI) process either before or after the epitaxial growth in the recessed source and drain regions. An anneal process after the PAI process enables consistent growth of the dislocations in the source and drain regions. The dislocations in the source and drain regions (or stressor regions) can form consistently to produce targeted strain in the source and drain regions to improve carrier mobility and device performance for NMOS devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.