Wei-Yang Lee
193Patents
9h-index
100Co-inventors
79Inventor score
Filing activity: Jun 19, 2008 → Jun 17, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8334198B2 | Method of fabricating a plurality of gate structures | Electricity | 44 | Active |
| US9287403B1 | FinFET and method for manufacturing the same | Electricity | 26 | Active |
| US10522642B2 | Semiconductor device with air-spacer | Electricity | 23 | Active |
| US9293534B2 | Formation of dislocations in source and drain regions of FinFET devices | Electricity | 20 | Active |
| US10868181B2 | Semiconductor structure with blocking layer and method for forming the same | Electricity | 14 | Active |
| US9570556B1 | Semiconductor device and manufacturing method thereof | Emerging Cross-Sectional Technologies | 14 | Active |
| US8008143B2 | Method to form a semiconductor device having gate dielectric layers of varying thicknesses | Electricity | 13 | Active |
| US8334197B2 | Method of fabricating high-k/metal gate device | Electricity | 10 | Active |
| US9768256B2 | Formation of dislocations in source and drain regions of FinFET devices | Electricity | 10 | Active |
| US10153344B2 | Formation of dislocations in source and drain regions of FinFET devices | Electricity | 9 | Active |
| US9129988B1 | FinFET and method of manufacturing the same | Electricity | 9 | Active |
| US9029912B2 | Semiconductor substructure having elevated strain material-sidewall interface and method of making the same | Electricity | 8 | Active |
| US9112033B2 | Source/drain structure of semiconductor device | Electricity | 8 | Active |
| US9748389B1 | Method for semiconductor device fabrication with improved source drain epitaxy | Electricity | 8 | Active |
| US8283222B2 | Method to form a semiconductor device having gate dielectric layers of varying thickness | Electricity | 7 | Active |
| US10158000B2 | Low-K dielectric sidewall spacer treatment | Electricity | 7 | Active |
| US10217815B1 | Integrated circuit device with source/drain barrier | Electricity | 6 | Active |
| US9812576B2 | Semiconductor device and manufacturing method thereof | Emerging Cross-Sectional Technologies | 6 | Active |
| US7671640B2 | Direct injection-locked frequency divider circuit with inductive-coupling feedback architecture | Electricity | 4 | Active |
| US9865504B2 | Semiconductor device and manufacturing method thereof | Electricity | 4 | Active |
| US10403551B2 | Source/drain features with an etch stop layer | Electricity | 3 | Active |
| US11631746B2 | Semiconductor device and method of manufacture | Electricity | 3 | Active |
| US11189706B2 | FinFET structure with airgap and method of forming the same | Electricity | 3 | Active |
| US10396156B2 | Method for FinFET LDD doping | Electricity | 3 | Active |
| US10134902B2 | PMOS FinFET | Electricity | 3 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.