Method of planarizing substrate surface
US9773682B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 5, 2016 |
| Grant date | Sep 26, 2017 |
| Priority date | — |
| Expiry date | Jul 5, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of planarizing a substrate surface is disclosed. A substrate having a major surface of a material layer is provided. The major surface of the material layer comprises a first region with relatively low removal rate and a second region of relatively high removal rate. A photoresist pattern is formed on the material layer. The photoresist pattern masks the second region, while exposes at least a portion of the first region. At least a portion of the material layer not covered by the photoresist pattern is etched away. A polish stop layer is deposited on the material layer. A cap layer is deposited on the polish stop layer. A chemical mechanical polishing (CMP) process is performed to polish the cap layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.