Low dynamic resistance low capacitance diodes

US9773777B2 · kind B2 · utility

Assignee

• TEXAS INSTRUMENTS INCORPORATED · US

Inventors

• Andrew Strachan · Santa Clara, US
• Alexei Sadovnikov · San Jose, US
• Gang Xue · Beijing, CN
• Dening Wang · McKinney, US

Key dates

• Filing date: Jan 8, 2016
• Grant date: Sep 26, 2017
• Expiry date: Jan 8, 2036

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/115

Abstract

A low dynamic resistance, low capacitance diode of a semiconductor device includes a heavily-doped n-type substrate. A lightly-doped n-type layer 1 micron to 5 microns thick is disposed on the n-type substrate. A lightly-doped p-type layer 3 microns to 8 microns thick is disposed on the n-type layer. The low dynamic resistance, low capacitance diode, of the semiconductor device includes a p-type buried layer, with a peak dopant density above 1×1017 cm−3, extending from the p-type layer through the n-type layer to the n-type substrate. The low dynamic resistance, low capacitance diode also includes an n-type region disposed in the p-type layer, extending to a top surface of the p-type layer.